Certifying modular PLDs with the Universal Verification Methodology
Lead PLD Engineer, BAE Systems
Whilst they present a powerful tool, the use of PLDs in critical systems faces a number of on-going challenges that a leading to increased cost and timescales. Key issues include increased design size & complexity, increased certification requirements, and evolution of the underlying technology.
This talk will present a number of improvements in the approach to verifying PLDs that target these issues, with a particular emphasis on the use constrained random testing within a Universal Verification Methodology (UVM) framework.